question archive The shift register with right shift shown in figure is initially loaded with 0101, and 2-bit UP counter is reset initially
Subject:Electrical EngineeringPrice: Bought3
The shift register with right shift shown in figure is initially loaded with 0101, and 2-bit UP counter is reset initially. The op-amp shown is ideal and has characteristics as If V+ > V_ => Vout =+ Vsat [logic '1'] V+ SV_ => Vout =-V sat [logic '0'] CLK2 of counter is enabled by the output of the comparator, then the decimal value of counter output after 6 clock cycles of CLK1 is CLK1 0 1 0 2-bit CLK2 counter