question archive 1) Build a 1-bit ALU for bits 0 to 2 (without the SET line, but including the LESS input) as described in class

1) Build a 1-bit ALU for bits 0 to 2 (without the SET line, but including the LESS input) as described in class

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1) Build a 1-bit ALU for bits 0 to 2 (without the SET line, but including the LESS input) as described in class. Your 1-bit ALU is to do ADD, SUBTRACT, AND and OR. Use good hierarchical design (through modules in Verilog) and build most of it from pre-built modules constructed in Project 1.

2) Build a 1-bit ALU for the most significant bit (bit 3), including the SET line. Again, use good hierarchical design.

pur-new-sol

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